A simple computer generally includes a central processing unit CPU and a main memory. The CPU implements a sequence of operations encoded in a stored program. The program and data on which the CPU acts is typically stored in the main memory. The processing of the program and the allocation of main memory and other resources are controlled by an operating system. In operating systems where multiple applications may share and partition resources, the computer's processing performance can be improved through use of active memory.
Active memory is memory that processes data as well as storing it. It can be instructed to operate on its contents without transferring its contents to the CPU or to any other part of the system. This is typically achieved by distributing parallel processors throughout the memory. Each parallel processor is connected to the memory and operates on the memory independently of the other processing elements. Most of the data processing is performed within the active memory and the work of the CPU is thus reduced to the operating system tasks of scheduling processes and allocating system resources.
A block of active memory typically consists of the following: a block of memory, e.g. dynamic random access memory DRAM, an interconnection block and a memory processor processing element array. The interconnection block provides a path that allows data to flow between the block of memory and the processing element array. The processing element array typically includes multiple identical processing elements controlled by a sequencer. Processing elements are generally small in area, have a low degree of hardware complexity, and are quick to implement, which leads to increased optimisation. Processing elements are usually designed to balance performance and cost. A simple more general-purpose processing element will result in a higher level of performance than a more complex processing element because it can be easily coupled to many identical processing elements. Further, because of its simplicity, the processing element will clock at a faster rate.
In any computer system, it is important that data can be made available to the processor as quickly as possible. In an active memory device, the complexity of the device means that data has to be accessed from the memory via the processing elements. Thus, the speed of access to the memory by a host processor is reduced. In addition, the added complexity that an active memory device bestows on a computer system means that additional complexity is added to the method of accessing data from the active memory device, which itself imparts additional complexity on the host processor.
In current systems, due to this additional complexity, a host connected to an active memory device has to be custom designed specifically for the active memory device. Thus, hosts configured for connection with one type of active memory device cannot be used with a different type of active memory device. Furthermore, hosts which have been designed for connection with conventional memory devices, such as standard SDRAM memories, cannot be connected to active memory devices at all. As such, considerable expense is incurred in the development of computer systems using active memory devices, since not only does the active memory device have to be designed and built, but also a complete host system to operate with it. Conventional memory devices are defined as any type of non-active memory devices which can be addressed by conventional memory command signals conforming to common industry standards.
Accordingly, it is an object of the present invention to provide a standard memory interface for an active memory device which permits different types of host processors to access the memory in the device.
It is a further object of the present invention to provide a memory interface for an active memory device for use with conventional host processors which are configured to connect to standard “non-active” memory devices, such as a standard SDRAM memory module.